Target: Only use USART TX

RX is not required for our implementation since we've completely dropped the rootshell in
favour of straight up UART vomiting.

Signed-off-by: Patrick Pedersen <ctx.xda@gmail.com>
This commit is contained in:
Patrick Pedersen
2024-02-20 19:41:58 +01:00
parent 43ee0564c4
commit c3fa8bada4
4 changed files with 21 additions and 33 deletions

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@@ -120,21 +120,21 @@ Next, connect your Pi Pico to your target board as shown in the table below:
| Pi Pico | STM32F1 |
| ---------------- | --------- |
| GND | GND |
| GPIO0 / UART0_TX | USARTx_RX |
| ~~GPIO0 / UART0_TX~~ **NO LONGER USED** | ~~USARTx_RX~~ **NO LONGER USED** |
| GPIO1 / UART0_RX | USARTx_TX |
| GPIO2 | VDD |
| GPIO4 | NRST |
| GPIO5 | BOOT0 |
Where `USARTx_RX` and `USARTx_TX` are the `RX` and `TX` pins of the USART peripheral that will be used to dump the flash memory contents.
Where `USARTx_TX` refers to the `TX` pin of a selected USART peripheral on the STM device, which will be utilized for transmitting the flash memory contents.
The USART pins for STM32F1-series chips are assigned as follows:
The USART TX pins for STM32F1-series chips are assigned as follows:
| USART Peripheral | RX | TX |
| ---------------- | ---- | ---- |
| USART1 | PA10 | PA9 |
| USART2 | PA3 | PA2 |
| USART3 | PB11 | PB10 |
| USART Peripheral | TX |
| ---------------- | ---- |
| USART1 | PA9 |
| USART2 | PA2 |
| USART3 | PB10 |
Below is a picture that shows the hardware setup using a Blue Pill board as the target board with `USART1` used to dump the flash memory:

24
dump.py
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@@ -100,17 +100,17 @@ def print_instructions():
print(
"2. Connect the Pi Pico to the STM32F1 target as follows (left Pico, right STM):"
)
print(" GND -> GND ")
print(" 0 -> USARTx_RX")
print(" 1 -> USARTx_TX")
print(" 2 -> VDD ")
print(" 4 -> NRST ")
print(" 5 -> BOOT0 ")
print(" GND -> GND ")
print(" GPIO 0 -> NO LONGER USED (previously USARTx_RX)")
print(" GPIO 1 -> USARTx_TX")
print(" GPIO 2 -> VDD ")
print(" GPIO 4 -> NRST ")
print(" GPIO 5 -> BOOT0 ")
print("")
print("Where:")
print(" USART1_RX = PA10, USART1_TX = PA9")
print(" USART2_RX = PA3, USART2_TX = PA2")
print(" USART3_RX = PB11, USART3_TX = PB10")
print(" USART1_TX = PA9")
print(" USART2_TX = PA2")
print(" USART3_TX = PB10")
print("")
print("3. Follow further instructions provided by this script")
print("For more detailed steps, see the README.md file.")
@@ -456,9 +456,9 @@ if sram_entry_offset_supported(sram_entry_point) == False:
# Select USART if not provided alreay
if args.usart is None:
print("Please select the USART used by the STM32F1 target to dump firmware")
print("1: USART1 - RX: PA10 TX: PA9")
print("2: USART2 - RX: PA3 TX: PA2")
print("3: USART3 - RX: PB11 TX: PB10")
print("1: USART1 - TX: PA9")
print("2: USART2 - TX: PA2")
print("3: USART3 - TX: PB10")
print("Enter 1, 2 or 3: ", end="")
while True:
choice = input()

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@@ -72,7 +72,7 @@ typedef struct __attribute__((packed))
#define USART3 ((USART *)0x40004800u)
#define USARTDIV 0x00000341u // 9600 baud @ 8Mhz
#define USART_CR1_MSK 0x0000200Cu // 8-bit, no parity, enable RX/TX
#define USART_CR1_MSK 0x00002008u // 8-bit, no parity, enable TX
volatile USART *usart;
@@ -90,10 +90,6 @@ USART *init_usart1()
GPIOA->CRH &= ~(0xF << 4);
GPIOA->CRH |= (PIN_CONFIG_ALT_PUSH_PULL << 4);
// Set PA10 (RX) to input pull-up
GPIOA->CRH &= ~(0xF << 8);
GPIOA->CRH |= (PIN_CONFIG_INPUT_PULL_UP << 8);
/* Configure and enable USART1 */
USART1->BRR = USARTDIV;
USART1->CR1 = USART_CR1_MSK;
@@ -115,10 +111,6 @@ USART *init_usart2()
GPIOA->CRL &= ~(0xF << 8);
GPIOA->CRL |= (PIN_CONFIG_ALT_PUSH_PULL << 8);
// Set PA3 (RX) to input pull-up
GPIOA->CRL &= ~(0xF << 12);
GPIOA->CRL |= (PIN_CONFIG_INPUT_PULL_UP << 12);
/* Configure and enable USART2 */
USART2->BRR = USARTDIV;
USART2->CR1 = USART_CR1_MSK;
@@ -138,10 +130,6 @@ USART *init_usart3()
GPIOB->CRH &= ~(0xF << 8);
GPIOB->CRH |= (PIN_CONFIG_ALT_PUSH_PULL << 8);
// Set PB11 (RX) to input pull-up
GPIOB->CRH &= ~(0xF << 12);
GPIOB->CRH |= (PIN_CONFIG_INPUT_PULL_UP << 12);
/* Configure and enable USART3 */
USART3->BRR = USARTDIV;
USART3->CR1 = USART_CR1_MSK;